|Max. CPU clock rate||733 MHz to 2.66 GHz|
|FSB speeds||300 MHz to 6.4 GT/s|
|Architecture and classification|
Itanium ( eye-TAY-nee-?m) is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Launched in June 2001, Intel marketed the processors for enterprise servers and high-performance computing systems. The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel.
Itanium-based systems have been produced by HP/Hewlett Packard Enterprise (HPE) (the HPE Integrity Servers line) and several other manufacturers. In 2008, Itanium was the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, Power ISA, and SPARC.[needs update]
In February 2017, Intel released the final generation, Kittson, to test customers, and in May began shipping in volume. It is used exclusively in mission-critical servers from Hewlett Packard Enterprise.
Intel officially announced the discontinuation of the Itanium CPU family on January 30, 2019.
In 1989, HP determined that the Reduced Instruction Set Computing (RISC) architectures were approaching the processing limit at one instruction per cycle. HP researchers investigated a new architecture, later named Explicitly Parallel Instruction Computing (EPIC), that allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel. The goal of this approach is twofold: to enable deeper inspection of the code at compile time to identify additional opportunities for parallel execution, and to simplify the processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.
HP believed that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so it partnered with Intel in 1994 to develop the IA-64 architecture, derived from EPIC. Intel was willing to undertake the very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.
During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computing (CISC) architectures for all general-purpose applications.Compaq and Silicon Graphics decided to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.
Several groups ported operating systems for the architecture, including Microsoft Windows, OpenVMS, Linux, HP-UX, Solaris,Tru64 UNIX, and Monterey/64. The latter three were canceled before reaching the market. By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery timeframe of Merced began slipping.
Intel announced the official name of the processor, Itanium, on October 4, 1999.
Within hours, the name Itanic had been coined on a Usenet newsgroup, a reference to the RMS Titanic, the "unsinkable" ocean liner that sank on her maiden voyage in 1912. "Itanic" has since often been used by The Register, and others, to imply that the multibillion-dollar investment in Itanium--and the early hype associated with it--would be followed by its relatively quick demise.
|Max. CPU clock rate||733 MHz to 800 MHz|
|FSB speeds||266 MT/s|
|L2 cache||96 KB|
|L3 cache||2 or 4 MB|
|Architecture and classification|
|Products, models, variants|
By the time Itanium was released in June 2001, its performance was not superior to competing RISC and CISC processors. Itanium competed at the low-end (primarily four-CPU and smaller systems) with servers based on x86 processors, and at the high-end with IBM POWER and Sun Microsystems SPARC processors. Intel repositioned Itanium to focus on the high-end business and HPC computing markets, attempting to duplicate the x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing the PA-RISC in HP systems, Alpha in Compaq systems and MIPS in SGI systems, though IBM also delivered a supercomputer based on this processor. POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space, building on the economies of scale fueled by its enormous installed base.
Only a few thousand systems using the original Merced Itanium processor were sold, due to relatively poor performance, high cost and limited software availability. Recognizing that the lack of software could be a serious problem for the future, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to the market a year later.
Itanium 2 processor
|Max. CPU clock rate||900 MHz to 2.53 GHz|
|L2 cache||256 KB on Itanium2 |
256 KB (D) + 1 MB(I) or 512 KB (I) on (Itanium2 9x00 series)
|L3 cache||1.5-32 MB|
|Architecture and classification|
|Products, models, variants|
The Itanium 2 processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The first Itanium 2, code-named McKinley, was jointly developed by HP and Intel. It relieved many of the performance problems of the original Itanium processor, which were mostly caused by an inefficient memory subsystem. McKinley contains 221 million transistors (of which 25 million are for logic), measured 19.5 mm by 21.6 mm (421 mm2) and was fabricated in a 180 nm, bulk CMOS process with six layers of aluminium metallization.
In 2003, AMD released the Opteron CPU, which implements its own 64-bit architecture called AMD64. The Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Under the influence of Microsoft, Intel responded by implementing AMD's x86-64 instruction set architecture instead of IA-64 in its Xeon microprocessors in 2004, resulting in a new industry-wide de facto standard.
Intel released a new Itanium 2 family member, codenamed Madison, in 2003. Madison used a 130 nm process and was the basis of all new Itanium processors until Montecito was released in June 2006.
In March 2005, Intel announced that it was working on a new Itanium processor, codenamed Tukwila, to be released in 2007. The Tukwila would have four processor cores and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon processor. Later that year, Intel revised Tukwila's delivery date to late 2008.
In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate the software porting effort. The Alliance announced that its members would invest $10 billion in the Itanium Solutions Alliance by the end of the decade.
Intel released the Itanium 2 9100 series, codenamed Montvale, in November 2007. In May 2009, the schedule for Tukwila, its follow-on, was revised again, with the release to OEMs planned for the first quarter of 2010.
The Itanium 9300 series processor, codenamed Tukwila, was released on February 8, 2010, with greater performance and memory capacity.
The device uses a 65 nm process, includes two to four cores, up to 24 MB on-die caches, Hyper-Threading technology and integrated memory controllers. It implements double-device data correction, which helps to fix memory errors. Tukwila also implements Intel QuickPath Interconnect (QPI) to replace the Itanium bus-based architecture. It has a peak interprocessor bandwidth of 96 GB/s and a peak memory bandwidth of 34 GB/s. With QuickPath, the processor has integrated memory controllers and interfaces the memory directly, using QPI interfaces to directly connect to other processors and I/O hubs. QuickPath is also used on Intel processors using the Nehalem microarchitecture, which possibly enabled Tukwila and Nehalem to use the same chipsets. Tukwila incorporates four memory controllers, each of which supports multiple DDR3 DIMMs via a separate memory controller, much like the Nehalem-based Xeon processor code-named Beckton.
This section needs to be updated.April 2017)(
The Itanium 9500 series processor, codenamed Poulson, is the follow-on processor to Tukwila and was released on November 8, 2012.[failed verification] According to Intel, it skips the 45 nm process technology and uses a 32 nm process technology. It features eight cores and has a 12-wide issue architecture, multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization. The Poulson L3 cache size is 32 MB. L2 cache size is 6 MB, 512 I KB, 256 D KB per core. Die size is 544 mm², less than its predecessor Tukwila (698.75 mm²).
At ISSCC 2011, Intel presented a paper called "A 32nm 3.1 Billion Transistor 12-Wide-Issue Itanium Processor for Mission Critical Servers." Given Intel's history of disclosing details about Itanium microprocessors at ISSCC, this paper most likely referred to Poulson. Analyst David Kanter speculated that Poulson would use a new microarchitecture, with a more advanced form of multithreading that uses up to two threads, to improve performance for single threaded and multithreaded workloads. Some information was also released at the Hot Chips conference.
Information presented improvements in multithreading, resiliency improvements (Intel Instruction Replay RAS) and few new instructions (thread priority, integer instruction, cache prefetching, and data access hints).
Intel's Product Change Notification (PCN) 111456-01 lists four models of Itanium 9500 series CPU, which was later removed in a revised document. The parts were later listed in Intel's Material Declaration Data Sheets (MDDS) database. Intel later posted Itanium 9500 reference manual.
During the 2012 Hewlett-Packard Co. v. Oracle Corp. support lawsuit, court documents unsealed by a Santa Clara County Court judge revealed that in 2008, Hewlett-Packard had paid Intel around $440 million to keep producing and updating Itanium microprocessors from 2009 to 2014. In 2010, the two companies signed another $250 million deal, which obliged Intel to continue making Itanium CPUs for HP's machines until 2017. Under the terms of the agreements, HP has to pay for chips it gets from Intel, while Intel launches Tukwila, Poulson, Kittson, and Kittson+ chips in a bid to gradually boost performance of the platform.
Rumors of a successor to Poulson (code named Kittson) began to circulate in 2012-2013. This was at first associated with a forthcoming 22 nm process shrink, and later revised in the face of declining Itanium sales to a less-ambitious 32 nm node. In April 2015, Intel, although it had not yet confirmed formal specifications, did confirm that it continued to work on the project. Meanwhile, the aggressively multicore Xeon E7 platform displaced Itanium-based solutions in the Intel roadmap.
In July 2016, the HP spin-off Hewlett Packard Enterprise (HPE) announced in Computer World that Kittson would be released mid-2017. In February 2017, Intel reported that it was shipping Kittson to test customers, with plans to ship in volume later that year.
The models are:
|9720||4||8||1.73 GHz||20 MB|
|9740||8||16||2.13 GHz||24 MB|
|9750||4||8||2.53 GHz||32 MB|
|9760||8||16||2.66 GHz||32 MB|
In comparison with its Xeon family of server processors, Itanium has never been a high-volume product for Intel. Intel does not release production numbers. One industry analyst estimated that the production rate was 200,000 processors per year in 2007.
According to Gartner Inc., the total number of Itanium servers (not processors) sold by all vendors in 2007, was about 55,000. (It is unclear whether clustered servers counted as a single server or not.) This compares with 417,000 RISC servers (spread across all RISC vendors) and 8.4 million x86 servers. IDC reports that a total of 184,000 Itanium-based systems were sold from 2001 through 2007. For the combined POWER/SPARC/Itanium systems market, IDC reports that POWER captured 42% of revenue and SPARC captured 32%, while Itanium-based system revenue reached 26% in the second quarter of 2008. According to an IDC analyst, in 2007, HP accounted for perhaps 80% of Itanium systems revenue. According to Gartner, in 2008, HP accounted for 95% of Itanium sales. HP's Itanium system sales were at an annual rate of $4.4Bn at the end of 2008, and declined to $3.5Bn by the end of 2009, compared to a 35% decline in UNIX system revenue for Sun and an 11% drop for IBM, with an x86-64 server revenue increase of 14% during this period.
In December 2012, IDC released a research report stating that Itanium server shipments would remain flat through 2016, with annual shipment of 26,000 systems (a decline of over 50% compared to shipments in 2008).
By 2006, HP manufactured at least 80% of all Itanium systems, and sold 7,200 in the first quarter of 2006. The bulk of systems sold were enterprise servers and machines for large-scale technical computing, with an average selling price per system in excess of US$200,000. A typical system uses eight or more Itanium processors.
By 2012, only a few manufacturers offered Itanium systems, including HP, Bull, NEC, Inspur and Huawei. In addition, Intel offered a chassis that could be used by system integrators to build Itanium systems.
By 2015, only HP supplied Itanium-based systems. With HP split in late 2015, Itanium systems (branded as Integrity) are handled by Hewlett-Packard Enterprise (HPE), with recent major update in 2017 (Integrity i6, and HP-UX 11i v3 Update 16). HPE also supports a few other operating systems, including Windows up to Server 2008 R2, Linux, OpenVMS and NonStop. Itanium is not affected by Spectre and Meltdown.
The Itanium bus interfaces to the rest of the system via a chipset. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. IBM created a chipset in 2003, and Intel in 2002, but neither of them developed chipsets to support newer technologies such as DDR2 or PCI Express. Before "Tukwila" moved away from the FSB, chipsets supporting such technologies were manufactured by all Itanium server vendors, such as HP, Fujitsu, SGI, NEC, and Hitachi.
The "Tukwila" Itanium processor model had been designed to share a common chipset with the Intel Xeon processor EX (Intel's Xeon processor designed for four processor and larger servers). The goal was to streamline system development and reduce costs for server OEMs, many of which develop both Itanium- and Xeon-based servers. However, in 2013, this goal was pushed back to be "evaluated for future implementation opportunities".
Itanium is currently supported by the following operating systems:
Emulation is a technique that allows a computer to execute binary code that was compiled for a different type of computer. Before IBM's acquisition of QuickTransit in 2009, application binary software for IRIX/MIPS and Solaris/SPARC could run via type of emulation called "dynamic binary translation" on Linux/Itanium. Similarly, HP implemented a method to execute PA-RISC/HP-UX on the Itanium/HP-UX via emulation, to simplify migration of its PA-RISC customers to the radically different Itanium instruction set. Itanium processors can also run the mainframe environment GCOS from Groupe Bull and several x86 operating systems via instruction set simulators.
Itanium is aimed at the enterprise server and high-performance computing (HPC) markets. Other enterprise- and HPC-focused processor lines include Oracle's and Fujitsu's SPARC processors and IBM's POWER microprocessors. Measured by quantity sold, Itanium's most serious competition comes from x86-64 processors including Intel's own Xeon line and AMD's Opteron line. Since 2009, most servers were being shipped with x86-64 processors.
In 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage has declined as the industry shifted to x86-64 clusters for this application.
An Itanium-based computer first appeared on the list of the TOP500 supercomputers in November 2001. The best position ever achieved by an Itanium 2 based system in the list was #2, achieved in June 2004, when Thunder (Lawrence Livermore National Laboratory) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by June 2012, this had dropped to one system (0.2%), and no Itanium system remained on the list in November 2012.
The Itanium processors show a progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667 MHz.
|Merced||180 nm||2001-06||733 MHz||96 KB||none||266 MHz||1||1||116||2 MB off-die L3 cache|
|800 MHz||130||4 MB off-die L3 cache|
|McKinley||180 nm||2002-07-08||900 MHz||256 KB||1.5 MB||400 MHz||1||1||130||HW branchlong|
|1 GHz||3 MB||130|
|Madison||130 nm||2003-06-30||1.3 GHz||3 MB||130|
|1.4 GHz||4 MB||130|
|1.5 GHz||6 MB||130|
|2003-09-08||1.4 GHz||1.5 MB||130|
|1.4 GHz||3 MB||130|
|Deerfield||1.0 GHz||1.5 MB||62||Low voltage|
|Hondo||1.1 GHz||4 MB||400 MHz||2||1||260||32 MB L4|
|Fanwood||1.6 GHz||3 MB||533 MHz||1||1||130|
|1.3 GHz||400 MHz||62?||Low voltage|
|Madison||1.6 GHz||9 MB||400 MHz||130|
|1.67 GHz||6 MB||667 MHz||130|
|1.67 GHz||9 MB||667 MHz||130|
|Itanium 2 9000 series|
|Montecito||90 nm||1.4 GHz||256 KB (D)+
1 MB (I)
|6-24 MB||400 MHz||1||2||104||Virtualization, Multithread, no HW IA-32|
|1.6 GHz||533 MHz|
|Itanium 2 9100 series|
|256 KB (D)+
1 MB (I)
|1||1-2||75-104||Core-level lockstep, demand-based switching|
|Itanium 9300 series|
|256 KB (D)+
512 KB (I)
|10-24 MB||QPI with
|1||2-4||130-185||A new point-to-point processor interconnect, the QPI,|
replacing the FSB. Turbo Boost
|Itanium 9500 series|
|256 KB (D)+
512 KB (I)
|20-32 MB||QPI with
|1||4-8||130-170||Doubled issue width (from 6 to 12 instructions per cycle),|
Instruction Replay technology, Dual-domain hyperthreading
|Itanium 9700 series|
|256 KB (D)+
512 KB (I)
|20-32 MB||QPI with
|1||4-8||130-170||No architectural improvements over Poulson,|
5 % higher clock for the top model
When first released in 2001, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Emulation to run existing x86 applications and operating systems was particularly poor, with one benchmark in 2001 reporting that it was equivalent at best to a 100 MHz Pentium in this mode (1.1 GHz Pentiums were on the market at that time). Itanium failed to make significant inroads against IA-32 or RISC, and suffered further following the arrival of x86-64 systems which offered greater compatibility with older x86 applications.
In a 2009 article on the history of the processor -- "How the Itanium Killed the Computer Industry" -- journalist John C. Dvorak reported "This continues to be one of the great fiascos of the last 50 years". Tech columnist Ashlee Vance commented that the delays and underperformance "turned the product into a joke in the chip industry". In an interview, Donald Knuth said "The Itanium approach...was supposed to be so terrific--until it turned out that the wished-for compilers were basically impossible to write."
Both Red Hat and Microsoft announced plans to drop Itanium support in their operating systems due to lack of market interest; however, other Linux distributions such as Gentoo and Debian remain available for Itanium. On March 22, 2011, Oracle Corporation announced that it would no longer develop new products for HP-UX on Itanium, although it would continue to provide support for existing products. Following this announcement, HP sued Oracle for breach of contract, arguing that Oracle had violated conditions imposed during settlement over Oracle's hiring of former HP CEO Mark Hurd as its co-CEO, requiring the vendor to support Itanium on its software "until such time as HP discontinues the sales of its Itanium-based servers", and that the breach had harmed its business. In 2012, a court ruled in favor of HP, and ordered Oracle to resume its support for Itanium. In June 2016, Hewlett-Packard Enterprise (the corporate successor to HP's server business) was awarded $3 billion in damages from the lawsuit.
A former Intel official reported that the Itanium business had become profitable for Intel in late 2009. By 2009, the chip was almost entirely deployed on servers made by HP, which had over 95% of the Itanium server market share, making the main operating system for Itanium HP-UX. On March 22, 2011, Intel reaffirmed its commitment to Itanium with multiple generations of chips in development and on schedule.
Although Itanium did attain limited success in the niche market of high-end computing, Intel had originally hoped it would find broader acceptance as a replacement for the original x86 architecture.
AMD chose a different direction, designing the less radical x86-64, a 64-bit extension to the existing x86 architecture, which Microsoft then supported, forcing Intel to introduce the same extensions in its own x86-based processors. These designs can run existing 32-bit applications at native hardware speed, while offering support for 64-bit memory addressing and other enhancements to new applications. This architecture has now become the predominant 64-bit architecture in the desktop and portable market. Although some Itanium-based workstations were initially introduced by companies such as SGI, they are no longer available.
...the 9700 series will be the last Intel Itanium processor.
...developers can quickly develop applications today that will be compatible with and can easily be tuned for Solaris on Merced.
KitGuru Says: Even though it is highly likely that "Kittson" chips will be released, it does not seem that Intel and HP actually want to invest R&D money in boosting performance of IA-64 chips. As a result, it looks like the best thing "Kittson" will offer will be a 20 per cent performance improvement over current gen offerings.
The Gentoo/IA-64 Project works to keep Gentoo the most up to date and fastest IA-64 distribution available.
Once touted by Intel as a replacement for the x86 product line, expectations for Itanium have been throttled well back.
Windows Server 2008 R2 will be the last version of Windows Server to support the Intel Itanium architecture," [...] "SQL Server 2008 R2 and Visual Studio 2010 are also the last versions to support Itanium.